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advanced audio recording

 
A virtual analog filter module for the Audio-DSP in VHDL
  Filter Module


48kHz
x
24 Bit



ladder filter simulation with pSPICE - A Moog Filter in an FPGA

A ladder filter similar to classical MOOG-filters is built in VHDL to be integrated into the workstation. Therefore the analog behaviour is investigated in order to emulate non ideal effects too. This includes noise, non linearity of the transistors, heating effects, capacitors' non linearity, saturation effects and even PCB effects like cross talk and wire resistance / parasitic capacitors against GND. Also capacity of the pins are modelled. The circuit was described using standard components and C-language like equations, formerly created to be placed into the ABM-blocks in the pSPICE simulator. For the semiconductor modelling a bipolar transistor model similar to Gummel-Poon was taken. The equations were transformed into a full pipeline model in VHDL for FPGAs. The depth an precision of the model can be scaled in order to adapt to small FPGAs too. The current model occupies a large Cyclone 2 FPGA when sized in a moderate way.

Read another article about analog modelling:
Analog Example


 
96 kHz
Audio DSP

 

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