A classical digital
synthesizer in a Xilinx PLD
This page shows the design of my first
music synthesizer using a programmable logic device (PLD). The
design was originally created for a simple Xilinx PLD that we used
at the university around 10 years ago, and was expanded to come
close to classic analog music synthesizers. It already partly
overcomes the capabilities of my Casio HT 3000.
In a digital
circuit like this, the functions are programmed using pure
mathematical methods to incorporate the characteristics of
well-known analog synthesizers.
The design uses
DDS technology with a tuning word derived from the frequency
information in the MIDI word, which drives a phase counter. Together
with the newly introduced vibrato, this generates a final phase that
is available to the waveform generators.

The phase counter
is used a a saw tooth directly. The triangle is generated by
flipping the bits partially when the phase counter is greater than
50%. The sine wave then is generated with a trick, in a way known
from diode limiters such as the ICL8038: When the amplitude
increases, it is clipped. To achieve this, it required a lot of
compare function with are too much for the PLD. Therefore another
way is used: A wave is subtracted from the actual triangle, in fact
the third harmonic. The phase of that harmonic is generated by
shift-and-add processing like f-sine = tria(f) * 3 + tria (3f).
Together with a clipping this produces a (more) sine-like tone.

A simulation demonstrates the quality that could be achieved if
the chip had more resources available to implement additional waves.
Due to limited space, modulation via the parameters and the ADSR is
also very coarse and has only a few levels. This could be better
with a larger PLD.
For the moment it works much better in my
TMS320-Music-System
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